1. Field of the Invention
The present invention pertains to the field of integrated circuit die packaging. More particularly, this invention relates to constructing a dual sided integrated circuit chip package that employs wire bond process technology with offset wire bonds and support blocks with cavities for stitch bonding support.
2. Art Background
Plastic chip packages are commonly employed for holding integrated circuit dies. A typical prior plastic package is constructed on a section of a metal leadframe. Each leadframe section provides a die pad for mounting an integrated circuit die. Each leadframe section also provides a set of lead fingers for electrical connection between the corresponding integrated circuit die and external circuitry. Such a plastic package provides protection for the integrated circuit die and provides electrical connection to the integrated circuit die via the lead fingers extending from the package.
Such prior plastic chip packages typically contain one integrated circuit die per package. The integrated circuit die is typically mounted on one side of a die pad. The integrated circuit is usually mounted on either the top or the bottom side of the die pad. Typically, the integrated circuit die, attached to a die pad, is wire bonded to corresponding lead fingers. The die pad, the integrated circuit die, and the wire bonding are typically encapsulated with molding compound through plastic injection molding or with glob top.
The utility of an integrated circuit chip package can be increased by enclosing two or more integrated circuit dies in one chip package. For example, an integrated circuit die package containing two memory chips can double the density of a memory system without increasing the printed circuit board area containing the memory chips. Another example is an integrated circuit die package containing a microcontroller or processor on one side and a memory chip on the other side.
Prior manufacturing techniques for constructing such dual sided integrated circuit chip packages usually employ tape automated bonding (TAB) techniques. Unfortunately, TAB techniques commonly require the formation of gold signal pad structures on the integrated circuit dies. The formation of gold structures increases the cost of such double sided chip packages. In addition, TAB techniques typically require gang bonding equipment for the manufacturing process. Such gang bonding equipment greatly increases the manufacturing cost for such double sided packages. Moreover, current TAB techniques may not be as reliable as conventional wire bonding techniques.